论文标题
极端软件定义的无线电 - GHz实时
Extreme Software Defined Radio -- GHz in Real Time
论文作者
论文摘要
软件定义的无线电是用于设计可重构调制解调器的广泛接受的范式。摩尔定律的持续游行使得在通用处理器上进行实时信号处理，可用于大量波形。低功率ARM处理器可以处理低Mbps的数据速率，并且可以在大型X86处理器上支持更高的数据速率。全软件开发（与FPGA/DSP/GPU）的优点令人信服：人才库更大，开发时间和成本较低，并且更容易维护和移植。但是，非常高率的系统（高于100 Mbps）仍然牢固地牢固地在自定义和半定期硬件（主要是FPGA）的范围内。在本文中，我们描述了一个SDR的体系结构和测试床，可以轻松缩放以支持超过3 GHz的带宽和数据速率高达10 GBP。该论文涵盖了一种新型技术，可以平行于相位和符号跟踪的序列算法，然后对大规模并行体系结构的数据分布进行讨论。我们简要描述了混合信号前端，并以测量结果得出结论。据作者所知，本文所述的系统比任何先前发布的结果都要快。
Software defined radio is a widely accepted paradigm for design of reconfigurable modems. The continuing march of Moore's law makes real-time signal processing on general purpose processors feasible for a large set of waveforms. Data rates in the low Mbps can be processed on low-power ARM processors, and much higher data rates can be supported on large x86 processors. The advantages of all-software development (vs. FPGA/DSP/GPU) are compelling: much wider pool of talent, lower development time and cost, and easier maintenance and porting. However, very high-rate systems (above 100 Mbps) are still firmly in the domain of custom and semi-custom hardware (mostly FPGAs). In this paper we describe an architecture and testbed for an SDR that can be easily scaled to support over 3 GHz of bandwidth and data rate up to 10 Gbps. The paper covers a novel technique to parallelize typically serial algorithms for phase and symbol tracking, followed by a discussion of data distribution for a massively parallel architecture. We provide a brief description of a mixed-signal front end and conclude with measurement results. To the best of the author's knowledge, the system described in this paper is an order of magnitude faster than any prior published result.
